Motherboard BIOS menus usually offer numerous settings to optimize your memory. Complete and thorough bios guides are out there to follow, but below are common latency options found in most modern bioses.

Command rate - is the delay (in clock cycles) between when chip select is asserted (ie. the RAM is selected) and commands (i.e. Activate Row) can be issued to the RAM. Typical values are 1T (one clock cycle) and 2T (two clock cycles). Mushkin has a good write up about CMD rate here

CAS (Column Address Strobe or Column Address Select) - is the number of clock cycles (or Ticks, denoted with T) between the issuance of the READ command and when the data arrives at the data bus. Memory can be visualized as a table of cell locations and the CAS delay is invoked every time the column changes, which is more often than row changing.

Trp (RAS Precharge Delay) - is the speed or length of time that it takes DRAM to terminate one row access and start another. In simpler terms, it means switching memory banks.

Trcd (RAS (Row Access Strobe) to CAS delay) - As it says it's the time between RAS and CAS access, ie. the delay between when a memory bank is activated to when a read/write command is sent to that bank. Picture an Excel spreadsheet with a number across the top and along the left side. They numbers down the left side represent the Rows and the numbers across the top represent the Columns. The time it would take you, for example, to move down to Row 20 and across to Column 20 is RAS to CAS.

Tras (Active to Precharge or Active Precharge Delay) - controls the length of the delay between the activation and precharge commands ---- basically how long after activation can the access cycle be started again. This influences row activation time which is taken into account when memory has hit the last column in a specific row, or when an entirely different memory location is requested.

tRC (Row Cycle) & tRFC (Row Refresh Cycle) - tRC is the minimum time interval between successive active commands to the same bank.

These timings or delays occur in a particular order. When a Row of memory is activated to be read, there is a delay before the data on that Row is ready to be accessed, this is known as tRCD (RAS to CAS, or Row Address Strobe to Column Access Strobe delay). After the Row has been activated, the read command is sent, and the delay before it starts actually reading is the CAS (Column Access Strobe) latency. When reading is complete, the Row of data must be de-activated, which requires another delay, known as tRP (RAS Precharge), before another Row can be activated. The final value is tRAS, which is the minimum Active to Precharge delay. Once a row is activated, it cannot be de-activated until the delay of tRAS is over.

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by Exit edited by FastEddie
last modified: 2004-02-08 18:42:09