VOIP etc > Voice Over IP - VOIP > VOIP Tech Chat > WRTP54G-ER JTAG Unlock using windows

reply to GrauerFuchs

Re: WRTP54G-ER JTAG Unlock using windows

MSPFET MSP430 JTAG Project

It looks like the chip you selected would work well, but I do have a few concerns about your design. First of all, is this a unique design, or was it built to emulate or respond as the equivalent of another company's device? I was unable to locate any logical equivalent so far, so this particular cable may leave you needing to develop drivers and software for it.

If this is designed as a universal/broad range JTAG solution, do you plan on taking advantage of the NTRST and RTCK signals? I see those present on more devices, and some will not operate without the NTRST.

The 14-pin header you're using: Is this specific to a particular device you're programming, or are you building an internal/intermediate connection from which you would attach a cable for the individual device? The devices I have programmed used different pin configurations.

For noise reduction, I would recommend adding a capacitor between the VCC and the GND lines. This would reduce power 'ripple' from changing values on pins or less regulated equipment from having a strong effect on the data.

The diode array shouldn't be much of a problem. It's a commonly used design for parasitic devices. If you're worried about the losses involved, use diodes with a lower forward voltage drop. So long as you filter the output with a capacitor or two, it should be reliable enough for use.

Hi GrauerFuchs,

I'm not sure who's the author of this circuit, the
linked web site only allowed me to find some clues
relative to Kurt, ICQ #99826732, hellos, shura1974
or maybe Rustem S. Kalimullin but the later may be
a software contributor only while one of the above
is responsible for the circuit, actually.  Contact
attempts via ICQ failed so far, i joined the Yahoo
TI MSP430 MicroController Users Group hoping for a
sign from shura1974 but he may have left long ago.

There's no way for me to answer questions relative
to the exact purpose/origin of my sample schematic
at this time but i already made it clear that many
modifications are required for this to work with a
SpeedTouch anyway.  Two guys volunteered as guinea
pigs, an unbuffered (resistors-only) adaptor and a
"bare bones" (cheap/trimmed-down) buffered version
of Altera's MAX3xxx adaptor have been tested.  I'm
sorry to say i never got an opportunity to discuss
about how to use the Active-Low "System ReSeT" pin
at all, the best i obtained was redundant comments
relative to the Active-Low "Test ReSeT" line which
a pull-up resistor hard-wired and that's about it:
the 2nd adaptor being advertised world-wide by the
guy who took over my thread it became difficult to
criticize his design or even look at alternatives.



Here's what these volunteers seemed ready to agree
on:  the SpeedTouch's 5xx JTAG pins 2, 4, 6, 8 and
possibly 10 are connected to ground, pin 5 goes to
"TDO", pin 3 copies "TDI", pin 9 follows "TCk" and
pin 7 responds to "TMS" (they refused to cooperate
when i asked them to help identify the rest of the
pins:  they had found what they came for by then).

Now, about power decoupling, it's not obvious when
we look at the schematic but you'd find capacitors
near the ICs, normally...  The "ringing" i have in
mind is due to cable lengths and it is limited via
light RC networks on the inputs:  something like a
pair of 330 Ohms resistors with one 100 pF ceramic
capacitor in the middle to shunt some of the noise
to ground, for example.  The boys wrote that their
transfers were hours long, i suppose this wouldn't
affect speed significantly.  Finally, about that 5
Volts supply sucking power out of a parallel port,
low forward voltage diodes may be needed anyway or
i'd have to step-up, regulate, monitor and control
voltages relatively to the "TDO" signal.  Ouch!...

Moved SpeedTouch JTAG conversation to:

»[Equipment] SpeedTouch series JTAG flashing adapters

Mod request: Could you move the previous 5 posts in this thread to the new topic as well? Thank you.

reply to DerGrauerFuchs
How did you flash the new -NA firmware after you followed these steps ?
- I followed all the steps to erase the configuration partitions
- I set the ProductID in both the boot loader and Image A to CYWM
- I even set the ADMIN_PWD environment variable to a blank hashed password
Still /update.html doesn't like Admin / blank
I am doing all this on a Fonage router, with firmware version: 1.00.20 (an old one, but it doesn't work through CYT unlocker - probably too old for it)

The first thing to do is check and make sure the changes you made to ADMIN_PWD are there. On mine, the variable was read-only, and had to be removed from the bootloader file by JTAG.

Easiest solution to loading the firmware is to do so by tftp on the bootloader console. Set up a tftp server with the NA firmware in its root filesystem, format the IMAGE_A and IMAGE_B partitions, and then issue the tftp command from the (psbl) prompt. I believe the following should work:

(psbl) fmt IMAGE_A
(psbl) fmt IMAGE_B
(psbl) tftp -i {server IP} {firmware} IMAGE_A
(psbl) tftp -i {server IP} {firmware} IMAGE_B
(psbl) boot
 

Thanks for the reply.
I've erased and flashed both images, but now the boot loader says

Basic POST completed... Success.
Last reset cause: Software reset (memory controller also reset)

PSPBoot1.3 rev: 1.3.3.11 ODM rev:1.6
(c) Copyright 2002-2005 Texas Instruments, Inc. All Rights Reserved.

Press ESC for monitor... 1

(psbl)

OS boot failed.


I was using the wrtp54g_fw_3.1.24_US.img firmware. Is that OK, or I need to strip something from it, to make it suitable for flashing through the PSPBoot loader ?

did you change the HEX offset in the firmware so it would load using the psbl (tftp) method?

see: »[General] DLink VTA-VR

reply to voiplover
Has anybody looked at the firmware 5.01.04 that fonage is pushing to their customers ? Is the Voice part similar to Sipura/PAP2 or similar to the 1.00.6x firmware used by fonage in the past ? Can it be used with an NA-ized WRTP54G ?

reply to voiplover
Thank you all for such great and detailed information.

For those who are still struggling:
10 Ohms or 100 Ohms works.
Make sure wrtp54g.exe supports your flash (read more on Spansion).
"/fc:55" specifies the flash chip type.
When CPU not entering debug mode and waiting forever to clear watchdog, check your cable and check your setup of your parallel port including the driver.
I had everything working except a wrong version of wrtp54g.exe. For some unknown reason, I got the clearing watchdog wait when I got the correct wrtp54g.exe. I spent hours checking my cable (multimeter and all).
I moved to a different computer and it works like a charm.

Again,
thank you all.