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 koitsuPremium,MVM join:2002-07-16 Mountain View, CA kudos:14 1 edit | i7-2600K with one core running 10C cooler Core #1, why so cool? |
Something curious: my i7-2600K CPU (physical 4 cores) shows the above DTS-provided temperatures for each core (remember: DTSes are per-core, and are not external thermistors). This is with the latest CoreTemp (1.0 RC3).
Core #1 is always around 7-10C cooler than my other cores -- when idle and when under load. This machine has been powered on and used for weeks, so it has nothing to do with "burn-in".
This is on Windows XP SP3. Also, disabling HyperThreading (dropping from 8 "threads" to 4 "threads") has no bearing on the problem (nor would I expect it to).
I am absolutely 100% certain this is not a software bug because many others have seen it, and with completely different softwares. Here's a compiled list of URLs where others have reported the same behaviour (including on older CPUs, as well as AMD CPUs):
* »communities.intel.com/thread/21417 * »forums.overclockers.co.uk/showth···20808627 * »www.overclock.net/t/974816/i7-26···temps/10 * »www.overclock.net/t/1202210/one-···the-rest * »forum.corsair.com/v3/showthread.php?t=99095 * »forums.overclockers.com.au/showt···t=963035 * »forum.corsair.com/v2/showthread.php?t=98930 * »www.tomshardware.com/forum/26612···emp-high * »answers.yahoo.com/question/index···5AABpfud
For some folks it's one core running too hot, for others it's one core running too cold.
I'm not looking for "I bet it's thermal paste-related" (utter nonsense and on so many levels that I won't even bother replying to such), HSF-related (see above threads; everyone complaining uses different HSFs and sees this issue) or generic user responses ("imi comuptr tehcnihshin lol") on this one. I'm looking for technical explanations that are well-founded. I have a few of my own, but they're extremely far-fetched. The Intel forum link I provided has some of these jhonkas who can't explain the extreme delta yet try to, so I was hoping I could find someone here who actually could explain the difference. Remember: these things are microns apart, so external cooling (HSF, etc.) would affect all cores, not just one.
My far-fetched theory is that these individual cores are not all identical; we all know that companies manufacture cores and proceed to stress test them individually. Some withstand higher clocks/voltage than others. The end result is that company tries a lower clock speed/voltage and if its stable uses the core in a CPU that meets that level of stability/speed. (E.g. if a core isn't stable at 3.5GHz but is fine at 3.2GHz, stick it into a CPU that is intended to be sold as 3.2GHz)
I have a feeling I'm going to have to engage Intel Technical Support on this one, and I really would rather not because historically they "stonewall" me from being able to talk to actual hardware engineers who can explain this behaviour. It's too bad I lost contact years ago with a friend of mine at Intel and another at AMD who did CPU design.  -- Making life hard for others since 1977. I speak for myself and not my employer/affiliates of my employer. | |  matt5 join:2001-10-06 Lagrangeville, NY | The general idea is always either the probe is reading wrong (calibration, whatever) or the IHS is not mating with the HS well.
While they are close, Intel stated the tcase max of a CPU was say 72 on the older core 2 I think because the temperature variation could be as much as 30C. Quite a bit.
I think something with in the one core being different would be sort of weird... they all should be running the same clock speed and voltage with the same number of transistors... you would think that would not matter in temp as nothing could be really different but... eh... maybe. | |  pnjunctionTeksavvy ExtremePremium join:2008-01-24 Toronto, ON kudos:1 | reply to koitsu If it shows the same temperature differential at idle and at load I would guess that it is an offset in the temperature sensor.
The idle one is most suspicious. When looked at as deviations from the ambient temperature the difference in power consumption between cores would have to be huge (~3x) for one to be 25C and another 35C. That's assuming 20C ambient, if it were higher ambient it's even worse (ie at 25C ambient a core at 25C can't be burning any significant power).
Intel will stonewall you because this isn't really a problem, as in if you didn't look at those temperatures you'd never know the difference the CPU works fine I'm assuming. | |  | reply to koitsu Now you have a reason to lap your cpu. =D. | |  Reviews:
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1 edit | reply to koitsu Intel's digital thermal sensors (DTSs) are not designed to give an exact temperature reading of each core. They are only designed to be the most accurate at higher temperatures as they approach Tj Max (98 degrees Celsius for the 2600K.) I think you woul find if you were to run a highly stressful program that stresses all cores evenly (such as Prime95,) you would find that the difference in temperatures within the cores would be less.
Intel's sensors are not that great at showing an accurate idle temperature without using a program that can be calibrated and can compensate for the erratic data the DTSs feed it, such as RealTemp.
More info on it, here> »www.techpowerup.com/realtemp/docs.php
By the way, idle temperature doesn't mean squat, it is absolutely useless to worry about your idle temperature. What you need to make sure of is that the CPU cores do not get above 75-80 in any of the applications that you use.
My 2600K also has one sensor that is always "lower" than the rest. Same thing occurred on my old Q6600 as well. It's completely normal, and doesn't necessarily mean that your heatsink is not on properly or that you need to lap your CPU. | | |
|  koitsuPremium,MVM join:2002-07-16 Mountain View, CA kudos:14 1 edit |  Core #1, still a smooth operator | |  After a few more minutes... | |
Under load, (running Prime95 with 8 threads), the delta is still there, but happens to be slightly less (6-7C rather than 10C). Core #0 in the attached screenshot is probably being used for Firefox while I type this. Be sure to note the "Max" column in the screenshots; I'm basing the delta off that.
This more or less refutes the "you can't honour delta when the machine is idle" argument, although there does seem to be some truth to the delta decreasing when the cores are under load. But, the delta is still quite large either way.
My Q9550 did not do this (deltas between cores were about 1-2C maximum, and no single core was "better off" than others).
And yes, lapping the CPU, replacing HSF, thermal grease, etc. == all nonsense recommendations (and for those who recommended it probably in jest, I even covered this in my first post ). You and I definitely agree on that one.
As such, I'm going to consider this massive delta for a single core to be normal -- I just find it very strange, and as I've proven, I'm not the only one to see this behaviour. I just wish I had an actual, proven, validated-by-engineers reason for it. -- Making life hard for others since 1977. I speak for myself and not my employer/affiliates of my employer. | |  Anonymous_AnonymousPremium join:2004-06-21 127.0.0.1 kudos:2 | reply to koitsu nothing wrong with it I had some XEONs that had upto 8C difference. one would be -1C another core would be 7C on air cooling inside temp was about 33F heating cost are too high so it's not worth it to keep it warm. | |  | reply to koitsu Your temps are absolutely normal and its perfectly fine for one core to be hotter than the others. Those are good temps and theres no need for concern. | |  Reviews:
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| reply to koitsu said by koitsu:Under load, (running Prime95 with 8 threads), the delta is still there, but happens to be slightly less (6-7C rather than 10C). Core #0 in the attached screenshot is probably being used for Firefox while I type this. Be sure to note the "Max" column in the screenshots; I'm basing the delta off that.
This more or less refutes the "you can't honour delta when the machine is idle" argument, although there does seem to be some truth to the delta decreasing when the cores are under load. But, the delta is still quite large either way.
My Q9550 did not do this (deltas between cores were about 1-2C maximum, and no single core was "better off" than others).
And yes, lapping the CPU, replacing HSF, thermal grease, etc. == all nonsense recommendations (and for those who recommended it probably in jest, I even covered this in my first post ). You and I definitely agree on that one.
As such, I'm going to consider this massive delta for a single core to be normal -- I just find it very strange, and as I've proven, I'm not the only one to see this behaviour. I just wish I had an actual, proven, validated-by-engineers reason for it. Did you read the article I linked to?
»www.techpowerup.com/realtemp/docs.php
It has a lot of information about this, maybe not engineer-confirmed, but the most detailed explanation you'll get otherwise.
59 degrees is barely even warm as far as the 2600K is concerned. Those sensors are there to be accurate as the temperature approaches Tj Max. At only 59 degrees, your CPU is still 39 degrees Celsius away from Tj Max. That's 70 degrees Fahrenheit. A long way to go. If you were to push your temps up into the 65-70-degree C range I bet the delta would shrink even more. | |  koitsuPremium,MVM join:2002-07-16 Mountain View, CA kudos:14 | No I did not -- but I just now did (and yes I read most of it, about the first 70% or so). The issue with TJMax not being defined explicitly I've known about for some time, but then I read this part of the article:
quote: Starting with Core i7, Intel has improved this situation by including the TJ Target goal within each CPU. This information is still only TJ Target though so there is no guarantee that the actual TJMax of a core is exactly equal to the value stored within each core of these processors but at least this is a step in the right direction.
The last part really doesn't mean anything; it's only a step in the right direction if the values being set per-core are accurate.
So, what this means to me (as an engineer), is that Intel originally (prior to the Core iX) provided a TJTarget temperature on a per physical CPU basis (not per-core, per physical CPU). Then with the introduction of the Core iX, Intel added TJTarget temperatures on a per-core basis -- yet, they appear to be setting them incorrectly/wrong for some cores before they get shipped out.
I imagine this is because of what I speculated above -- when manufacturing a processor, I'm willing to bet they do it on a per-core basis, then stress test each core individually somehow. Then they set TJTarget on all the cores to the same value, package the physical CPU, and ship the thing out. That's really quite depressing if true. Not that it's anyone's fault here, but quite honestly this makes hardware monitoring (and trust me, as the author of such software I'm quite familiar with the nuances) a real pain in the ass. An earlier poster stated he saw the same behaviour on a Xeon system, which means this is a universal issue and not specific to just consumer/desktop products (I do not know how this is acceptable given that Xeon CPUs are priced for enterprise environments, yet what you'd get are inaccurate temperatures... yeah, great).
I should be crystal clear about my post here: I am not having stability problems with the system, I am not worried about "high temperatures" (I'm well aware my system runs quite cool even under load), blah blah blah. This is purely an issue of an engineer (me) wanting to know the exact, true, accurate reason for why a single core would have a delta of almost 10C compared to other cores. Telling an engineer "that's just how it works, suck it up and accept it" when there is no concise documentation explaining/justifying the behaviour is akin to pissing on their shoes -- it just upsets us, it doesn't really solve anything.
I'll start firing off some Emails to some of my contacts at common review sites (who have contact with Intel directly and so on) to see if someone can get an official answer. I'm amazed someone hasn't gotten in Intel's face about this by now, especially for how long its gone on. -- Making life hard for others since 1977. I speak for myself and not my employer/affiliates of my employer. | |  signmeuptooLove those still alivePremium join:2001-11-22 NanoParticle kudos:4 Reviews:
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| reply to koitsu You know what I think, koitsu...
The footprint of a modern processor is quite small and the cores are proximal, no less. I don't know how cores so closely packed could possibly vary an actual 10 degrees C. as they are just too close to each other. I think something is wrong with the calibration or reading. We're talking just millimeters, and virtually no distance between cores.
I can see 2 degrees INSTANTANEOUS variations between cores, but not a fairly static 10 degree delta. I don't see how that would be possible, they are all made from the same chunk of wafer, after all.
The ONLY way that they could vary that much is the peltier effect, and I really doubt that phsics problem exists between cores. -- Join Teams Helix and Discovery. Rest in Peace, Leonard David Smith, my best friend, you are missed badly! Rest in peace, Pop, glad our last years were good. Please pray for Colin, he has ependymoma, a brain cancer, donate to a children's Hospital. | |  Reviews:
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| reply to signmeuptoo
Re: i7-2600K with one core running 10C cooler said by signmeuptoo:...I think something is wrong with the calibration or reading. We're talking just millimeters, and virtually no distance between cores... That's what I'm saying and it's what the article I linked to states. The sensors just aren't designed to be accurate at such low temperatures that the OP was displaying. The Tj Max for the 2600K is 98 degrees Celsius. At 56 degrees there is plenty of room to spare.
I understand that OP wants even more details than can be stated by the article I linked to, but that's the most detailed explanation available on the Internet to this date. Maybe OP does in fact have contacts that can directly communicate with Intel and get an engineer's report, but I don't see how that's going to happen seeing as this has been an issue since the first Core 2 Duos were released in 2006 and displayed this same behavior. I would think that by this time, if there were a more detailed explanation, it would be out there on the Internet.
That being said, I hope that if OP does in fact receive more information, that OP will post said information in this thread, as I am interested and I am sure many other people would be interested to know exactly what's going on here as well. | |  Reviews:
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1 edit | reply to koitsu The cores aren't made individually and then installed, nor are complete chips made even one CPU at a time. A hundred or more complete CPU dies are made at once, on a single wafer of silicon. These days one wafer can be as large as 200 mm in diameter. Each individual die on the wafer is a complete CPU, with all cores, cache and logic circuits for that CPU contained on that single piece of silicon. Each CPU is tested while they are still part of the wafer, using incredibly tiny needle point connectors to probe each bonding wire pad on the CPU. Die that totally fail testing at this stage are automatically marked with dye and then discarded at the next stage in manufacturing, when the dies are cut apart and made ready for packaging.
Once in their packaging the CPU's move on to final test. This is where Intel determines what speed level each can achieve and marks the package accordingly. The only difference between the "slow" i7's and the "fast" i7's on a wafer is how well they performed during final test. The ones that can run at max speed get marked as such and sold at the highest price, the slower ones sell for less, yet they all came from the same silicon wafer. Minute variations in the thickness of the various metal and dielectric layers cause changes in the capacitance of the internal circuitry. It is also affected by any contaminants in the air, chemicals, evaporated metals, and other materials used in the process. Remembering RC time constants for Electronics 101, a rise in capacitance increases the time for a signal to rise or fall. At the voltage and speeds inside a modern CPU, a slight change can alter things dramatically.
The temp sensors are also just part of the circuitry that is laid down layer by layer during manufacturing. So it isn't much of a stretch for some of them to be out of spec at some temps, but if it passes the test parameters at a certain test temp, then out the door the entire CPU goes.
Lots of other things are done to maximize product yield from each wafer. For example, some AMD quad core chips have one core fail some test or another and get that core disabled. This way AMD can sell it as a tri-core chip instead of throwing it away. Intel probably has some stuff like this that they do as well. I recall that back in the early 486 days Intel was having difficulty making 486's with working floating point math circuitry. They figured out how to totally disable that circuity and sell the CPU as a 486SX. Different label, same die inside. It just didn't have some of the functions available in the 486DX.
OK, I've rambled on enough... The point I was trying to make is that they don't make the cores and then stick the ones that work into a package together. It's one piece, totally interconnected on the die. Here's a link to a pic I found online of an i7 die: »www.tweaktown.com/cms/gallery.ph···title=#0 Click the top left pic. | |  Reviews:
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| Yeah, there's no way that they could make something like the i7 work very well with separate dies for each core. Core 2 Quads consisted of 2 dies with 2 cores each, each set of cores sharing 4MB (or 6MB) of L2 cache for a total of 8MB (or 12MB) of L2. If core #3 needed data from the cache located near core #0, it would have to do so across the FSB. The FSB also got data from RAM, HDD, pretty much everything except the L1 and L2 cache.
On the new i-series, the memory controller is now on the same die as the cores and L1/L2 cache (plus added L3 cache.) Each core has their own dedicated L1/L2 cache, and the L3 cache is located on-die where there is no need for FSB. With the memory controller being integrated on-die as well, again, no need for FSB. Integrated DMI, means no FSB. With the Sandy Bridge CPUs now even the PCIe lanes are integrated on-die (previously handled by QPI or FSB.)
In other words, inter-process communication would suffer greatly if they made cores individually, then later combined them in a package.
»www.youtube.com/watch?v=NVhxmQKQbVI
The basics.
Also, here's a microscopic view of the Sandy Bridge (2600K) die as well as a naked-eye of the single die that has 4 cores with Hyper-Threading, integrated memory controller, DMI, PCIe, L3 Cache, the works.

 | |  rusdiAmerican VPremium,MVM join:2001-04-28 Flippin, AR kudos:1 | reply to koitsu I think signmeuptoo has got it.
I spoke to a friend, (an electrical engineer NOT CPU engineer), and he explained it to me this way, (sounded good to me). Hope this satisfies the *engineer* in ya. 
This is assuming the temp sensors are accurate, or *close*. 
"If you are familiar with air-cooled four cylinder motorcycle engines, then you are aware the inner two cylinders will run hotter than the outer two. Doesn't take an engineer, of any type to understand this. Depending on the layout of the CPU die, and how the cores are etched in the silicone chip, one or more will produce heat at different rates, and if a core is surrounded on all sides with another heat producing core, (or any heat producing item) it will register warmer than the other cores." -- Come fold for a cure with us @ Team Helix.
| |  Relkin join:2006-03-05 nightmare | reply to HarryH3 said by HarryH3: These days one wafer can be as large as 200 300 mm in diameter with even larger coming. Just a minor correction to what Harry said. | |  Reviews:
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1 edit | reply to koitsu  »imageshack.us/f/706/36070963.jpg/
oh and maybe... :
»www.overclock.net/t/305443/ihs-r···he-facts
quote: (1.3) So wait, If the IHS spreads the heat and provides a larger surface area for the heatsink/waterblock which is a good thing, why is this thread about IHS removals?
Now we get to the good stuff, the IHS is not actually built into the die, but is soldered on at the factory by Intel on most CPUs. Solder is pretty much melted metal at a high temp, it is a heat conductive glue that won't melt unless the temp is extremely high, higher than the CPU is capable of outputting. CPUs with soldered IHS's generally have great temps out of the box as hardened solder is extremely strong and is the best "filler" you can use for such a situation, so strong that you have a high chance to damage the die upon removal of IHS. On the other hand there are many CPUs out there that do not have their IHS soldered to the die, instead using TIM between the die and IHS. TIM stands for Thermal Interface Material and acts as a filler when two objects that appear flat (the die and IHS in this case) are to make contact. The thing is the contact between the die and IHS is so close, but not perfect, there is tiny air pockets trapped between the two, and if these spaces aren't filled the heat will transfer to the IHS very slowly as air is a poor conductor.
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| Not bad... 4GHz, but ouch, 1156 processor. My 2600K is clocked at 4.3GHz . 32nm, cool, and the socket is Ivy Bridge compatible. Let's just hope Ivy Bridge can do 4.6 or better easily...
As for TIM, I highly doubt that TIM is the reason for OP's temperature readings. I have changed TIM on plenty of CPUs with this same "issue" and it never changed anything for them.
My recommendation is to just not worry about it, as idle temperatures don't mean anything. It's load temp that actually matters, and they will be plenty accurate enough as temps rise. | |
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