said by HELLFIRE:the architecture of the 5510 the two GigEs is split across two seperate PCI buses, but I think I'm out to lunch on that one.
...yeah, I'm out to lunch on that... see
this block diagramSo in which case it looks like if you remove the limiter in the CPU, the next one is the bus itself. I want to say ASA uses PCI (133Mbyte/sec) but I think I'm wrong on that... do let us know what your testing shows, I'm quite interested!
Should also add Cisco had
this blurb about maximizing throughput on the 5550 -- don't see why it wouldn't apply to the 5510 as well..
My 00000010bits
Regards